Carnegie Mellon University

Data Storage Systems Center

College of Engineering

view from Hamerschlag Hall

May 19, 2016

Faculty and student win best paper, will present at ICC

Professors Jim Bain and Vijayakumar Bhagavatula, along with ECE Ph.D. students Yongjune Kim and Abhishek Sharma, in collaboration with Western Digital Research, have received a Best Paper Award of the 2016 IEEE International Communications Conference (ICC). 

Their paper, “Locally Rewritable Codes for Resistive Memories,” proposes a new class of codes to improve lifetime and power efficiency of resistive memories. Resistive memories are non-volatile memories that store data by changing the resistance of each memory cell. They include phase change memories (PCM) and resistive random access memories (RRAM). In spite of their advantages of scalability, fast speed, and rewritability, they have the important problems of limited lifetime and high write power consumption. These problems should be addressed in order to open up many potential applications. The proposed locally rewritable codes are designed to improve lifetime and power efficiency of resistive memories. 

The IEEE ICC is one of the two flagship conferences of the IEEE Communications Society, together with IEEE GLOBECOM. The ICC is one of the largest gatherings of researchers and industry professionals in the field of communications. This year, around 2500 papers were submitted and only 15 papers were selected as Best Paper Awards. 

The researchers will present their paper at the 2016 ICC in Kuala Lumpur. This research was supported by Data Storage Systems Center (DSSC) at Carnegie Mellon University. 


We propose locally rewritable codes (LWC) for resistive memories inspired by locally repairable codes (LRC) for distributed storage systems. Small values of repair locality of LRC enable fast repair of a single failed node since the lost data in the failed node can be recovered by accessing only a small fraction of other nodes. By using rewriting locality, LWC can improve endurance limit and power consumption which are major challenges for resistive memories. We point out the duality between LRC and LWC, which indicates that existing construction methods of LRC can be applied to construct LWC.